The Common Hardware Reference Platform (CHRP), which was jointly developed by Apple Computer, IBM, and Motorola and is now known simply as the PowerPC Platform, is meant to provide a common architecture for operating-system vendors, application developers, and hardware platform designers. The common architecture was developed so that changes in the firmware can facilitate multiple operating systems that run on the same or different systems from multiple manufacturers, as well as provide compatibility with common hardware and software.

The plan is for new applications and systems to work together efficiently by design instead of by force, as in porting. A single computer will be able to run any 32-bit operating system, such as Windows NT, Macintosh, Advanced Interactive Executive (AIX), Sun Solaris, and OS/2, and the ease of computer integration into a corporate network environment will increase significantly.

The primary goal of this specification is to allow hardware developers the latitude to incorporate new technologies into their system architectures without compromising the integrity of their core design. Therefore, different manufacturers will be able to build systems with a variety of capabilities--each with its own unique strengths and values--on anything from laptops to enterprise servers.

The cost of developing new PowerPC systems will be drastically reduced because manufacturers are using a common design methodology and building compatibility with existing hardware and software into the architecture itself. This should be particularly attractive to both manufacturers and end users alike because lower manufacturing costs and shorter development times keep system prices down. And keep in mind, the scope of PowerPC products will be enormous.

Figure A shows the layers of the PowerPC Platform. The hardware is at the lowest level, with the Runtime Abstraction Services (RTAS), which is similar to the Hardware Abstraction Layer (HAL) on NT, on top of it. This provides the operating system with access to the platform's basic hardware. The device drivers use both the operating system and the RTAS to access specific features, such as add-on I/O devices. The operating system can directly access the hardware, but only if the operating system is "platform-aware," meaning that the system must have specific knowledge of certain hardware components and must contain the code to handle them. This will allow vendors the opportunity to add sophisticated functions and still maintain "least common denominator" compatibility.

Applications see only standard APIs, which provide software compatibility with any PowerPC Platform-compliant system. This plat-form is a melding of the Power Macintosh and the PRP environments. However, the PRP and the PowerPC Platform are distinctly different.

The PowerPC Platform "assists" the operating system by providing firmware interfaces for hardware access. This eases the transition for older, non-layered operating systems that don't have their own hardware abstraction. Most importantly, this new specification means that the operating systems can rely on a given set of features being implemented in the same way across all of the compatible platforms, and conversely, the platforms present a known and fixed set of interfaces to the operating systems.

The rest of the PowerPC Platform architecture defines the standards necessary to maintain the "least common denominator" functionality.

  • Open Firmware is used to provide basic booting services. It can load big- or little-endian, from a number of disk formats: Macintosh operating system, File Allocation Table (FAT), AIX, ISA 9660, in addition to some power- and platform-management functions and a lower-level user interface.
  • Devices, such as non-volatile RAM (NVRAM), clocks, and switches, can be implemented in any way as long as they conform to the specified requirements, and the firmware can access any necessary functions with them.
  • Platform designers are free to use whatever chips or packages they want for basic I/O devices, such as serial and parallel ports, timers, direct memory access (DMA), and so forth, as long as they maintain the programming models set up by the PowerPC Platform specification.
  • There is no mandatory BIOS: I/O device drivers should be presented to the Open Firmware module either from the system firmware or Plug-and-Play ROM (for expansion cards), but no specific mandatory method and alternative load implementations are provided.
  • There are three classes of platforms--portables, desktops, and servers--and each has its own minimum system requirements.
  • The specification does not adopt a converged I/O model (for devices such as mice and keyboards), and instead allows freedom of choice for hardware ports (such as DIN-8 or DIN-9, or SCSI vs. IDE). The specification does ensure that the system will have the necessary support for the user's operating system and applications.
  • Interrupts are handled by the OpenPIC interrupt controller, allowing for efficient multiprocessor interrupt systems, and the specification includes the PC-style cascaded-8259 scheme.

The future of the PowerPC Platform specification lies in its ability to adapt to new technologies and new standards. This first version has left a few things out and included some others which inhibit performance, such as backward-compatibility to the 8259 interrupt controller. However, as operating systems evolve, these features will change and allow system developers to redesign for lower chip counts. And, when new technologies become de facto standards, they will be evaluated as to whether it makes sense to include them in the specification itself.

Expect to see systems from Motorola capable of running both the Macintosh and Windows NT operating systems (each with all attendant applications) by August of this year. Apple Data Bus (ADB) ports for Macintosh systems will first be available as a PCI add-on. The ports should appear on the motherboard by December of this year.